VLSI Design and Embedded System

June 2010 to august 2011 - Assistant professor in KIIT University,Bhubaneswar,odisha . September 2011 (continuing) - Assistant Professor in VSSUT Burla, Odisha

Digital VLSI, Computer Architecture, Quantum computing, Nano Magnetic Logic

International Publications

1. Sahu, S. R., Bhoi, B. K., & Pradhan, M. (2020). Fast signed multiplier using Vedic Nikhilam algorithm. IET Circuits, Devices & Systems, 14(8), 1160-1166.
2. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2020). Synthesis and simulation study of non-restoring cell architecture layout in perpendicular nano-magnetic logic. Journal of Computational Electronics, 19(1), 407-418.
3. Gadtia, S., Padhan, S. K., & Bhoi, B. K. (2020). Square root formulae in the Śulbasũtras and Bakhshãlĩ manuscript. Journal of Interdisciplinary Mathematics, 23(1), 1-10.
4. Pathak, N., Kumar, S., Misra, N. K., & Bhoi, B. K. (2019). A modular approach for testable conservative reversible multiplexer circuit for nano-electronic confine application. International Nano Letters, 9(4), 299-309.
5. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2019). Analysis on Fault Mapping of Reversible Gates with Extended Hardware Description Language for Quantum Dot Cellular Automata Approach. Sensor Letters, 17(5), 371-378.
6. Barik, R. K., Bhoi, B. K., & Pradhan, M. (2018). An efficient redundant binary adder with revised computational rules. Computers & Electrical Engineering, 72, 224-236.
7. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2018). Design of magnetic dipole based 3D integration nano-circuits for future electronics application. International Journal of Nano Dimension, 9(4), 374-385.
8. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2018). A novel vedic divider based crypto-hardware for nanocomputing paradigm: An extended perspective. International Journal of Nano Dimension, 9(4), 336-345.
9. Bhoi, B., Misra, N. K., & Pradhan, M. (2017). Design and evaluation of an efficient parity-preserving reversible QCA gate with online testability. Cogent Engineering, 4(1), 1416888.
10. Misra, N. K., Sen, B., Wairya, S., & Bhoi, B. (2017). Testable novel parity-preserving reversible gate and low-cost quantum decoder design in 1D molecular-QCA. Journal of Circuits, Systems and Computers, 26(09), 1750145.
11. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2017). A universal reversible gate architecture for designing n-bit comparator structure in quantum-dot cellular automata. International Journal of Grid and Distributed Computing, 10(9), 33-46.
12. Padhan, S. K., Gadtia, S., & Bhoi, B. (2016). FPGA based implementation for extracting the roots of real number. Alexandria Engineering Journal, 55(3), 2849-2854.
13. A High Speed Divider Architecture Using Paravartya Sutra of Vedic Mathematics.( International Journal of Applied Engineering Research,volume 10,2015)

International Conferences

1. Novel Binary divider architecture for high speed VLSI applications(2013 IEEE Conference on Information and Communication Technologies (ICT 2013)
2. An Improved FPGA based model for Automatic Traffic Sign Detection.(IEEE  ICSTM  2015)
3. A Smart Fuzzy based system design for future prediction of medical condition(2nd International conference  on  emergent  trends  in  computing and communication,Feb 2015)

1. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2018). Novel robust design for reversible code converters and binary incrementer with quantum-dot cellular automata. In Intelligent Computing and Information and Communication (pp. 195-205). Springer, Singapore.
2. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2018). Design of conservative gate and their novel application in median filtering in emerging QCA nanocircuit. In Proceedings of the Second International Conference on Computational Intelligence and Informatics (pp. 131-141). Springer, Singapore.
3. Misra, N. K., Sen, B., Wairya, S., & Bhoi, B. (2018, July). A Novel Parity Preserving Reversible Binary-to-BCD Code Converter with Testability of Building Blocks. In Proceedings of the Second International Conference on Computational Intelligence and Informatics: ICCII 2017 (Vol. 712, p. 383). Springer.
4. Singh, R., Misra, N. K., & Bhoi, B. (2019). Implementation of non-restoring reversible divider using a quantum-dot cellular automata. In Computational Intelligence in Data Mining (pp. 459-469). Springer, Singapore.
5. Bhoi, B. K., Misra, N. K., Pradhan, M., & Rout, R. (2019). Synthesis Methods of Baugh-Wooley Multiplier and Non-restoring Divider to Enhance Primitive’s Results of QCA Circuits. In Smart Intelligent Computing and Applications (pp. 237-245). Springer, Singapore.
6. Bhoi, B. K., Das, T., Misra, N. K., & Rout, R. (2019). An Explicit Cell-Based Nesting Robust Architecture and Analysis of Full Adder. In Recent Trends in Communication, Computing, and Electronics (pp. 547-555). Springer, Singapore.
7. Bhoi, B. K., Misra, N. K., Chouhan, S. S., & Acharya, S. (2019, July). Analyzing design parameters of nano-magnetic technology-based converter circuit. In International Symposium on VLSI Design and Test (pp. 36-46). Springer, Singapore.
8. Bhoi, B. K., Misra, N. K., Dash, I., & Patra, A. (2020). A Redundant Adder Architecture in Ternary Quantum-Dot Cellular Automata. In Smart Intelligent Computing and Applications (pp. 375-384). Springer, Singapore.